| Part number: | XCV1000-6BGG560C |
| Description: | XCV1000-6BGG560C datasheet pdf and Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD) product details from Xilinx stock available at Utmel |
| Manufacturer | Xilinx |
| Encapsulation | - |
| Quantity | 0 |
| RoHS | YES |
| TYPE | DESCRIPTION |
| Surface Mount | YES |
| Number of Terminals | 560 |
| Package Shape | SQUARE |
| JESD-609 Code | e1 |
| Pbfree Code | Yes |
| Terminal Finish | Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
| HTS Code | 8542.39.00.01 |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Terminal Pitch | 1.27 mm |
| Reach Compliance Code | compliant |
| Pin Count | 560 |
| JESD-30 Code | S-PBGA-B560 |
| Qualification Status | Not Qualified |
| Temperature Grade | OTHER |
| Organization | 6144 CLBS, 1124022 GATES |
| Seated Height-Max | 1.7 mm |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Combinatorial Delay of a CLB-Max | 0.6 ns |
| Number of CLBs | 6144 |
| Number of Equivalent Gates | 1124022 |
| Length | 42.5 mm |
| Width | 42.5 mm |
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